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[Other] pio_shiyan

Description: NIOS学习的例子，使用QUARTUS进行编辑和IDE共同实现的，使用ALTERA公司的内带IP完成例子。-NIOS study example, the use of QUARTUS common IDE for editing and realized within the company using ALTERA complete with examples of IP.
Platform: | Size: 4979712 | Author: 李华 | Hits:

[Other] led_test

Description: 用Altera公司的EP2C35F672C8可配置软核技术生成的流水灯程序，在革新开发板上调试好的。-EP2C35F672C8 using Altera' s soft-core technologies can be configured to generate light flow procedures, the innovative development of a good on-board debugging.
Platform: | Size: 4514816 | Author: 孙志江 | Hits:

[VHDL-FPGA-Verilog] NiosII_Software_Developer_Handbook

Description: Nios II Software Developer s Handbook Nios II软件部分开发手册 也可以到Altera官方网上下载-Nios II Software Developer s Handbook
Platform: | Size: 1648640 | Author: weiw | Hits:

[Software Engineering] AlteraArticleContestPapers

Description: 本源码为Altera中国大学生电子设计文章竞赛的历届获奖论文汇编，内容主题涵盖如下4个方面： PLD在通讯、消费类、计算机和工业控制方面的应用 Altera器件、Quartus® II 软件的设计和优化技术 Altera FPGA在数字信号处理中的应用 Nios® II 软处理器在各领域的应用 获奖作品均是是参赛者独立设计的未曾公开发表过的原创性作品，在作品原创性和特色性 、实用性（结合当前的热点应用） 和作品的完整性（有明确的实验或仿真数）上均有很多优势 。 每年的获奖论文共18篇左右。-The source code for Altera Chinese Undergraduate Electronic Design Contest of the previous article, the compilation of award-winning paper, which covers four aspects as follows: PLD in the communications, consumer, computer and industrial control applications Altera devices, Quartus ® II software for design and optimization Altera FPGA technology in digital signal processing applications in the Nios ® II soft processor applications in various fields is the award-winning works were designed by participants independence had not been published original works in the works and the characteristics of originality, practical and (combined with the application of the current hot spots) and the integrity of the work (there are clearly a number of experimental or simulation) have many advantages on. The annual award-winning total of 18 papers around.
Platform: | Size: 26785792 | Author: 成逛 | Hits:

[VHDL-FPGA-Verilog] FFTVHDl

Description: 基于FPGA的fft实现 摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core (Nios) soft-core processor, chip or replace the traditional high-performance single-chip DSP to realize the audio signals based on FFT analysis .
Platform: | Size: 32768 | Author: xiang | Hits:

[VHDL-FPGA-Verilog] de2_lcm_ccd_sram

Description: 这是altera公司DE2的lcm-ccd-sram的代码，希望对大家编写有用-this code based on the altera DE2 board
Platform: | Size: 918528 | Author: ningning | Hits:

[VHDL-FPGA-Verilog] vhdl-MIPS

Description: Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
Platform: | Size: 4330496 | Author: ak | Hits:

[ARM-PowerPC-ColdFire-MIPS] DE2_NIOS_HOST_MOUSE_VGA

Description: 在ALTERA的DE2开发板上做的关于HOST_MOUSE的例子，基于Quartus II 和SOPC Builder以及Nios II IDE平台所完成！-ALTERA development in the DE2 board to do on HOST_MOUSE example, based on the Quartus II and SOPC Builder and Nios II IDE platform completed!
Platform: | Size: 1874944 | Author: liguoyin | Hits:

[ARM-PowerPC-ColdFire-MIPS] DE2_SD_Card_Audio

Description: 在ALTERA的DE2板子上做的一个读写SD卡的例子，基于QUARTUS II ,SOPC BUILDER ,Nios II IDE实现的，从SD卡读写东西-The DE2 board in ALTERA do an SD card reader example, based on the QUARTUS II, SOPC BUILDER, Nios II IDE achieved something from the SD card reader
Platform: | Size: 1816576 | Author: liguoyin | Hits:

[ARM-PowerPC-ColdFire-MIPS] DE2_USB_API

Description: 在ALTERA的DE2开发板上做的关于USB_API的例子，包括USB接口的初始化，驱动等。基于Quartus II,SOPC Builder, Nios II IDE 做的，有需要的可以参考一下，或者借用一下！写程序就是要多看别人的啊。-ALTERA development in the DE2 board to do on the USB_API examples, including the initialization of the USB interface, drivers and so on. Based on the Quartus II, SOPC Builder, Nios II IDE to do, there is a need to look at the can, or borrow some! Writing process is to look at other people, ah.
Platform: | Size: 1575936 | Author: liguoyin | Hits:

[ARM-PowerPC-ColdFire-MIPS] LED

Description: 在ALTERA的DE 2 开发板上做的一个类似闪烁的彩灯，用了16个LEDR，可以直接下载到板子上运行，基于经典的开发平台Quartus II+SOPC Builder+Nios II IDE 做的，只要看了以后，你就会自己设计各种花样的彩灯闪烁的样子了.所用语言有多种，VHDL,C/C++等-DE 2 in the development of the ALTERA board to do a similar flickering lantern, with a 16 LEDR, can be directly downloaded to the board on the operation of the development platform based on the classic Quartus II+ SOPC Builder+ Nios II IDE to do, just have to look at After, you will design their own patterns of lanterns flicker the same again. There are a variety of language, VHDL, C/C++, etc.
Platform: | Size: 4208640 | Author: liguoyin | Hits:

[VHDL-FPGA-Verilog] tt_nios_hardware_tutorial

Description: Altera NIOS II Hardware Tutorial
Platform: | Size: 718848 | Author: Calebe | Hits:

[VHDL-FPGA-Verilog] DE1_NIOS

Description: Altera DE1的NIOS源程序，非常有参考价值,可直接投入使用-the niosII project of Altera DE1 borad. It can be used directly
Platform: | Size: 1172480 | Author: gaoyukun | Hits:

[VHDL-FPGA-Verilog] Nios2_H264-AVC_DEC

Description: 在Altera开发环境下采用Nios II和硬件加速实现H.264解码的系统方案-The solution uses the Nios II development environment and hardware accelerate to implement H.264 decoding under Altera platform
Platform: | Size: 710656 | Author: Joe Zhu | Hits:

[Software Engineering] mnl_nios_programmers32

Description: nios处理器的介绍以及汇编代码的说明，altera公司的官方文件-introduction of nios processor & description of assembly code
Platform: | Size: 1100800 | Author: 丁丁 | Hits:

[Other] nios

Description: Quartus II为ALTERA公司取代大家所熟悉的最通用工具的MAX+PLUS II软件的升级版本，MAX+PLUS II在2000年已经停止更新了，而Quatrus目前已经更新到6.0版本，里面集成了很多非常有用的工具，如SOPC BUILDER等，这个工具相比其他同类EDA开发工具，和MAX+PLUS II一样仍是最好用的。MAX+PLUS II 用户可以非常方便的转入QUARTUS II工具的使用，因为用户可以选择和MAX+PLUS II一样的操作界面，况且有大量的中文说明可以帮助您更加详细的了解QUARTUS II的使用。-Quartus II for the ALTERA company will replace the familiar of the most common tools of the MAX+ PLUS II software, upgrade, MAX+ PLUS II in 2000, has stopped updating, while Quatrus now updated to version 6.0, which integrates a lot of very useful tools such as SOPC BUILDER etc., this tool compared with other similar development tools, EDA, and the MAX+ PLUS II uses the same is still the best. MAX+ PLUS II users can very easily turn to QUARTUS II the use of tools, because users can select and MAX+ PLUS II the same interface, and since a large number of Chinese explanation can help you more detailed understanding of QUARTUS II use.
Platform: | Size: 2936832 | Author: 蒋思 | Hits:

[VHDL-FPGA-Verilog] 71477225Nios

Description: altera nios对研究NIOS的人员很有帮助-altera nios research NIOS staff very helpful
Platform: | Size: 7777280 | Author: mstar | Hits:

[VHDL-FPGA-Verilog] 55593396NIosII

Description: altera nios相关数据手册,对研究NIOS的人员很有帮助-altera nios data manual for the study of NIOS staff very helpful
Platform: | Size: 599040 | Author: mstar | Hits:

[Home Personal application] niosVGA

Description:
Platform: | Size: 708608 | Author: bhahn | Hits:

[SCM] LED

Description: 本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA 公司的 Cyclone II 系列 FPGA 为数字平台，将微处理器、Avalon 总线、LED 点阵扫描控制器、存储器和人机接口控制器等硬件设备集中在一片 FPGA 上，利用片内硬件来实现 LED 点阵的带地址扫描，降低系统总功耗和简化 CPU 编程的同时，提高了系统的精确度、稳定性和抗干扰性能。-This design used the Nios II embedded processor based on SOPC technology. System to ALTERA' s Cyclone II series FPGA for digital platforms, microprocessors, Avalon bus, LED dot matrix scan controller, memory and man-machine interface controller and other hardware devices focused on an FPGA, using on-chip hardware to achieve the LED dot-matrix band address scan, reducing the total system CPU power consumption and simplify programming while increasing the system' s accuracy, stability and anti-jamming performance.
Platform: | Size: 968704 | Author: 叶子 | Hits:
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